1. Field of the Invention
The present invention is related to an envelope generator for an electronic musical instrument, and particularly to an envelope generator for an electronic musical instrument in which a transfer condition of an envelope phase can be judged with simple hardware.
2. Description of the Prior Art
Conventionally, in the electronic musical instrument, a system has been used in which a musical tone wave is read out from a wave memory and the wave signal is multiplied by an envelope to generate a musical tone wave signal. FIG. 1 is a functional block diagram shows the configuration of such electronic musical instrument. Keyboard 31 comprises, for instance, a plurality of keys each having a pair of switches.
Key assigner 32 consists of, for instance, a microcomputer or the like, and performs a so-called key assign processing and tone generating processing as follows. Key assigner 32 scans each switch of the keyboard 31 to check ON/OFF thereof for detecting a depressed key, and measures the key depression speed on the basis of the time-lag of the moments when the pair of switches corresponding the depressed key turn on to obtain an information on strength of tone generated by the depressed key. Then, it selects an idle channel of a plurality of tone generating channels, and instructs the selected channel to generate a tone of the pitch, tone strength and tone color corresponding to the depressed key.
Particularly, for key-on, key assigner 32 reads out from frequency data memory 33 a wave memory read address interval corresponding to the pitch corresponding to the depressed key, and sets it in accumulator 34. Also, according to the detected tone strength and predetermined tone color, key assigner 32 sets envelope generation control data (attack level, attack speed, etc.) in envelope generator 36.
Accumulator 34 accumulates the set wave memory read address intervals for each sampling period, and supplies the accumulated value to wave data generator (for example, ROM which stores wave data) 35 as an address to read out wave data therefrom. On the other hand, an envelope signal is generated from envelope generator 36 according to the set data, then the wave data and the envelope signal are multiplied together by multiplier 37 to form a musical tone wave signal. The musical tone wave signal is converted by D/A converter 38 to an analog tone signal which is amplified and converted by a sound system (e.g. amplifiers and speakers) to a musical tone. In FIG. 1, accumulator 34, wave data generator 35, envelope generator 36, multiplier 37 and D/A converter 38 can serve as a plurality of tone generating channels by time division multiprocessing.
In addition, upon detection of key-off, the key assigner 32 instructs envelope generator 36 to release or cease the tone generating.
FIG. 2 is a wave form diagram showing an example of the envelope wave generated in envelope generator 36. At key-on time (t0), an attack level L corresponding to the strength of key depression is set by key assigner and during an attack phase (t0-t1), a signal is generated which increases asymptotically from 0 to the attack level L at an attack speed that is set according to the tone color at the key-on time.
At time t1, upon detection of a current value E having reached to a value predetermined with relation to the attack level L, for instance, a value or level P corresponding to 90% of the attack level L, a decay phase is entered to generate a signal which approaches asymptotically to a decay level D at a decay speed that is set at the key-on time. The reason for employing such method for judging phase transfer is that timing for phase transfer (t1) is not varied even for a different attack level L if the attack speed is equal.
FIG. 3 is a block diagram showing an example of the conventional envelope generator 36. Current envelope value memory 1 stores a current value of envelope in fixed point data of 24 bits. Envelope phase memory 2 is a one-bit memory for storing a current phase of the envelope, and represents an attack phase if it contains "0", while it represents a decay phase if it contains "1".
Attack level memory 3 and decay level memory 4 respectively store the attack level L and decay level D which are set by the key assigner. Attack speed memory 5 and decay speed memory 6 store the asymptotic speeds in attack and decay phases, respectively, which are set by assigner 32 at the key-on time. All the data stored in these memories are in a floating point representation having an exponent part (power) of 4 bits (higher order four bits) and a fractional part (mantissa) of 4 bits (lower order four bits). Selectors 7 and 8 are controlled by the output of envelope phase memory 2 so that they output the contents of attack level memory 3 and attack speed memory 5 in the attack phase and select the contents of decay level memory 4 and decay speed memory 6 in the decay phase, respectively.
Floating point data to fixed point data conversion (F1Fx conversion) circuit 9 converts (4+4)-bit floating point data to 24-bit fixed point data. The F1Fx conversion circuit may be, for instance, a ROM which stores a conversion table, barrel shifter, or a combination of a counter and a shift register. Subtracter 10 subtracts the value E in the current envelope value memory from a target value converted to fixed point data, for instance, L. The difference (L-E) is reversely converted to floating point data by fixed point data to floating point data conversion (FxF1 conversion) circuit 11. The FxF1 conversion circuit can be comprised of, for instance, a combination of a barrel shifter and a priority encoder.
Multiplier 12 multiplies the difference value by the (4+4)-bit value in attack speed memory 5 or decay speed memory 6. This multiplication is performed in the floating point representation. That is, the fractional parts are multiplied together and the exponent parts are added. Accordingly, if it is assumed that the output of FxF1 conversion circuit 11 is in (4+8) bits, the output of multiplier 12 is in (5+12) bits at maximum.
The output of multiplier 12 is converted each to 24-bit fixed point data by F1Fx conversion circuit 13. Adder 14 adds the output of conversion circuit 13 and the value in current envelope value memory 1, and the resultant sum is written in current envelope value memory 1 to update the current value and the updated value is output. Thus, an output that approaches asymptotically to the target value is obtained.
Phase transfer control is now described. Multiplier 15 multiplies, for instance, in an attack phase, the output of selector 7 or the contents L of the attack level memory 3 by a predetermined constant K (e.g. 0.9). The constant K is in a floating point representation of (4+8) bits. The output of multiplier 15 is converted to 24-bit fixed point data by F1Fx conversion circuit 16.
Comparator 17 compares the output data of F1Fx conversion circuit 16 with the contents E of current envelope value memory 1, and generates an output signal "1" if the current envelope value E (at terminal A) is greater. Phase control circuit 18 directly writes the signal from comparator 17 in envelope phase memory 2 if the output of envelope phase memory 2 is "0", namely, for attack phase, and writes "1" if the output of envelope phase memory 2 is "1", namely, for decay phase.
With such circuit configuration, if the current envelope value E has reached 90% of the target value, the output of comparator 17 goes to "1" and hence the contents of envelope phase memory 2 is rewritten to "1", whereby a decay phase is entered. Such calculation is performed within a predetermined period, for instance, a sampling period, as many times as the number of tone generating channels which are time division multiplexed. In the conventional envelope generator as described above, there was a problem that a multiplier, F1Fx conversion circuit and comparator are required as the structural elements of the phase transfer control circuit, which increased hardware amount.